Synthesized Calculator in Verilog
A hardware calculator designed and synthesized from RTL
A calculator implemented in Verilog, developed from digital logic through synthesis and hardware verification.
Mark Pasacreta
Electrical engineer building thoughtful hardware and embedded systems.
I design and prototype electronics that connect careful circuit work with practical firmware. My projects span power electronics, mixed-signal design, and embedded systems, with an emphasis on measurement and clear documentation. I enjoy turning early ideas into reliable, testable hardware. This site collects selected builds and the engineering decisions behind them.
Selected projects
Traffic Light Controller in Verilog
A finite-state traffic controller implemented in RTL
A traffic light controller built in Verilog around a timed finite-state machine with deterministic transitions.
Supercapacitor Buffer
A bidirectional power stage for smoothing pulsed DC loads
A compact supercapacitor buffer that supplies short current peaks while keeping the upstream rail stable. Designed, simulated, assembled, and characterized from transient response through thermal performance.
Cryogenic Test Operations
Instrumentation and operations for cryogenic hardware testing
Hands-on cryogenic test operations spanning instrumentation, procedure execution, data collection, and system troubleshooting.
STM32 Load Control Board
Work in progress
A work-in-progress STM32-based board for embedded load control, monitoring, and system integration.
GSEv4
Work in progress
The fourth-generation ground support equipment platform, currently under development.